Kartik Nagar

Assistant Professor

IIT Madras


I am an Assistant Professor in the Department of CSE, IIT Madras. Previously, I was a postdoc in Purdue University working with Prof. Suresh Jagannathan. Before that, I did my PhD from IISc under the guidance of Prof. YN Srikant.

I am interested in developing Verification and Analysis techniques to improve the reliability, security and efficiency of Computer Systems. In this context, I am especially interested in solving theoretical and practical verification problems arising in Concurrent and Distributed Systems, Computer Architecture, Operating Systems and Real-time Systems.

Recently, I have worked on developing automated verification techniques for programs running under a weakly consistent memory model in the context of Distributed Replicated systems and Distributed Databases. Previously, I have also worked on developing static timing analysis techniques, focusing on the impact of the Hardware cache hierarchy on the Worst Case Execution Time of programs.


  • Automated Formal Verification
  • Program Analysis
  • Programming Languages


  • PhD, 2016

    Indian Institute of Science

  • M.Eng., 2012

    Indian Institute of Science


  • Teaching CS5030 Automated Program Verification in Jan-May 2023.
  • Paper titled ‘Certified Mergeable Replicated Data Types’ conditionally accepted at PLDI 22.
  • Teaching CS3300 Compiler Design.
  • Paper titled ‘Repairing Serializability Bugs in Distributed Database Programs via Automated Schema Refactoring’ conditionally accepted at PLDI 21.





  • Jude Anil
  • Rhythm Jain



Automated Reasoning for Replicated Systems

For global-scale applications such as Amazon, Twitter, Facebook, etc. with users distributed across the world, in order to provide a …

Timing Analysis for Real-time Systems

In Real-time systems, e.g. automobiles, aircrafts, space shuttles, robots, etc. programs are executed in response to external stimuli …